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1. general description the cbtd3306 dual fet bus switch features independent line switches. each switch is disabled when the associated output enable (noe ) input is high. the cbtd3306 is characterized for operation from ? 40 c to +85 c. 2. features and benefits ? designed to be used in 5 v to 3.3 v level shifting applications with internal diode ? 5 switch connection between two ports ? ttl-compatible input levels ? multiple package options ? latch-up protection exceeds 100 ma per jesd78b ? esd protection: ? hbm jesd22-a114f exceeds 2000 v ? cdm jesd22-c101e exceeds 1000 v 3. ordering information 4. marking cbtd3306 dual bus switch with level shifting rev. 5 ? 28 april 2011 product data sheet table 1. ordering information type number package name description version cbtd3306d so8 plastic small outline package; 8 leads; body width 3.9 mm sot96-1 CBTD3306PW tssop8 plastic thin shrink small outline package; 8 leads; body width 4.4 mm sot530-1 cbtd3306gt xson8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 1.95 0.5 mm sot833-1 cbtd3306gm xqfn8u plastic extremely thin qua d flat package; no leads; 8 terminals; body 1.6 1.6 0.5 mm sot902-1 table 2. marking codes type number marking code cbtd3306d cbtd3306 CBTD3306PW d306 cbtd3306gt w06 cbtd3306gm w06
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 2 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting 5. functional diagram 6. pinning information 6.1 pinning fig 1. logic diagram 1oe 1a 1b 2b 002aab98 5 2oe 2a 2 1 5 7 3 6 fig 2. pin configuration for so8 (sot96-1) fig 3. pin configuration for tssop8 (sot530-1) cbtd3306 1oe v cc 1a 2oe 1b 2b gnd 2a 001aak832 1 2 3 4 6 5 8 7 cbtd3306 1oe v cc 1a 2oe 1b 2b gnd 2a 001aak833 1 2 3 4 6 5 8 7 fig 4. pin configuration sot833-1 (xson8) fig 5. pin configuration sot902-1 (xqfn8u) cbtd3306 2b 2oe v cc 2a 1b 1a 1oe gnd 001aal404 36 27 18 45 transparent top view 001aal40 5 2b 1a 2oe v cc 2a 1oe gnd 1b transparent top view 3 6 4 1 5 8 7 2 terminal 1 index area cbtd3306
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 3 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level; z = high-impedance off-state. 8. limiting values [1] stresses beyond those listed may cause permanent damage to t he device. these are stress ra tings only and functional operatio n of the device at these or any other cond itions beyond those indicated under section 9. is not implied. exposure to absolute-maximum-rated conditions for extended periods ma y affect device reliability. [2] the input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 9. recommended operating conditions table 3. pin description symbol pin description 1oe , 2oe 1, 7 output enable input 1a, 2a 2, 5 data input/output (a port) 1b, 2b 3, 6 data input/output (b port) gnd 4 ground (0 v) v cc 8 positive supply voltage table 4. function selection [1] input input/output noe na, nb lna = nb hz table 5. limiting values in accordance with the absolute ma ximum rating system (iec 60134). [1] t amb = ? 40 c to +85 c, unless otherwise specified. symbol parameter conditions min max unit v cc supply voltage ? 0.5 +7.0 v v i input voltage [2] ? 0.5 +7.0 v i sw switch current - 128 ma i ik input clamping current v i/o =0v ? 50 - ma t stg storage temperature ? 65 +150 c table 6. operating conditions all unused control inputs of the device must be held at v cc or gnd to ensure proper device operation. symbol parameter conditions min typ max unit v cc supply voltage 4.5 - 5.5 v v ih high-level input voltage 2.0 - - v v il low-level input voltage - - 0.8 v t amb ambient temperature operating in free air ? 40 - +85 c
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 4 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting 10. static characteristics [1] all typical values are at v cc =5v, t amb =25 c. [2] this is the increase in supply current for each input th at is at the specified ttl voltage level rather than v cc or gnd. [3] measured by the voltage drop between the na and the nb termi nals at the indicated current through the switch. on resistance is determined by the lowest voltage of the two (na or nb) terminals. table 7. static characteristics voltages are referenced to gnd (ground = 0 v). symbol parameter conditions t amb = ? 40 c to +85 c unit min typ [1] max v ik input clamping voltage v cc =4.5v; i i = ? 18 ma - - ? 1.2 v i i input leakage current v cc =5.5v; v i = gnd or 5.5 v - - 1 a i cc supply current v cc =5.5v; i sw =0ma; v i =v cc or gnd --1.5ma v pass pass voltage see figure 6 to figure 10 ---v i cc additional supply current per input pin; v cc =5.5v; one input at 3.4 v, other inputs at v cc or gnd [2] --2.5ma c i input capacitance control pin; v i = 3 v or 0 v - 3.2 - pf c io(off) off-state input/output capacitance port off; v i = 3 v or 0 v; noe =v cc -6.5-pf r on on resistance v cc =4.5v; v i =0v; i i =64ma [3] -3.65 v cc =4.5v; v i =0v; i i =30ma [3] -3.65 v cc =4.5v; v i =2.4v; i i =15ma [3] -1735
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 5 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting 10.1 typical pass voltage graphs (1) i sw = 100 a (2) i sw = 6 ma (3) i sw =12 ma (4) i sw = 24 ma (1) i sw = 100 a (2) i sw = 6 ma (3) i sw =12 ma (4) i sw = 24 ma fig 6. pass voltage versus supply voltage; t amb =85 c (typical) fig 7. pass voltage versus supply voltage; t amb =70 c (typical) 001aak834 v cc (v) 4.4 5.6 5.2 4.8 2.8 2.4 3.2 3.6 v pass (v) 2.0 (4) (3) (1) (2) 001aak835 v cc (v) 4.4 5.6 5.2 4.8 2.8 2.4 3.2 3.6 v pass (v) 2.0 (4) (1) (2) (3) (1) i sw = 100 a (2) i sw = 6 ma (3) i sw =12 ma (4) i sw = 24 ma (1) i sw = 100 a (2) i sw = 6 ma (3) i sw =12 ma (4) i sw = 24 ma fig 8. pass voltage versus supply voltage; t amb =25 c (typical) fig 9. pass voltage versus supply voltage; t amb =0 c (typical) 001aak836 v cc (v) 4.4 5.6 5.2 4.8 2.8 2.4 3.2 3.6 v pass (v) 2.0 (4) (1) (2) (3) 001aak837 v cc (v) 4.4 5.6 5.2 4.8 2.8 2.4 3.2 3.6 v pass (v) 2.0 (4) (1) (3) (2)
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 6 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting (1) i sw = 100 a (2) i sw = 6 ma (3) i sw =12 ma (4) i sw = 24 ma fig 10. pass voltage versus supply voltage; t amb = ? 40 c (typical) 001aak838 v cc (v) 4.4 5.6 5.2 4.8 2.8 2.4 3.2 3.6 v pass (v) 2.0 (1) (3) (2) (4)
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 7 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting 11. dynamic characteristics [1] the propagation delay is the calculated rc ti me constant of the typical on resistanc e of the switch and the specified load c apacitance, when driven by an ideal volt age source (zero output impedance). [2] t pd is the same as t plh and t phl . t en is the same as t pzl and t pzh . t dis is the same as t plz and t phz . 12. waveforms table 8. dynamic characteristics voltages are referenced to gnd (ground = 0 v). for test circuit see figure 13 . symbol parameter conditions t amb = ? 40 c to +85 c unit min typ max t pd propagation delay na, nb to nb, na; see figure 11 [1] [2] - - 0.25 ns v cc = 5.0 v 0.5 v t en enable time noe to na or nb; see figure 12 [2] 1.0 - 5.4 ns v cc = 5.0 v 0.5 v t dis disable time noe to na or nb; see figure 12 [2] 1.0 - 4.9 ns v cc = 5.0 v 0.5 v measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 11. the data input (na, nb) to output (nb, na) propagation delay times 001aak30 5 t plh t phl v m v m nb, na output na, nb input v i gnd v oh v ol
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 8 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 12. enable and disable times 001aak29 8 t plz t phz outputs disabled outputs enabled v y v x outputs enabled output low to off off to low output high to off off to high noe input v i 3.5 v v m v m v ol v oh gnd gnd t pzl t pzh v m v m table 9. measurement points supply voltage input output v cc v i v m v m v x v y v cc = 5.0 v 0.5 v gnd to 3.0 v 1.5 v 1.5 v v ol + 0.3 v v oh ? 0.3 v
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 9 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting 13. test information test data is given in table 10 . all input pulses are supplied by generators having the following characteristics: prr 10 mhz; z o =50 . the outputs are measured one at a time with one transition per measurement. definitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 13. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l g table 10. test data supply voltage input load v ext v i t r , t f c l r l t plh , t phl t plz , t pzl t phz , t pzh v cc = 5.0 v 0.5 v gnd to 3.0 v 2.5 ns 50 pf 500 open 7.0 v open
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 10 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting 14. package outline fig 14. package outline sot96-1 (so8) unit a max. a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 0.25 dimensions (inch dimensions are derived from the original mm dimensions) notes 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. 1.0 0.4 sot96-1 x w m a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 4 5 pin 1 index 1 8 y 076e03 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.20 0.19 0.16 0.15 0.05 0.244 0.228 0.028 0.024 0.028 0.012 0.01 0.01 0.041 0.004 0.039 0.016 0 2.5 5 mm scale s o8: plastic small outline package; 8 leads; body width 3.9 mm sot96 -1 99-12-27 03-02-18
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 11 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting fig 15. package outline sot530-1 (tssop8) unit a 1 a max. a 2 a 3 b p l h e l p wy v ce d (1) e (2) z (1) references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.85 0.30 0.19 0.20 0.13 3.1 2.9 4.5 4.3 0.65 6.5 6.3 0.70 0.35 8 0 0.1 0.1 0.1 0.94 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.7 0.5 sot530-1 mo-153 00-02-24 03-02-18 w m b p d z e 0.25 14 8 5 a a 2 a 1 l p (a 3 ) detail x l h e e c v m a x a y 2.5 5 mm 0 scale t ssop8: plastic thin shrink small outline package; 8 leads; body width 4.4 mm sot530- 1 1.1 pin 1 index
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 12 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting fig 16. package outline sot833-1 (xson8) terminal 1 index area references outline version european projection issue date iec jedec jeita sot833-1 - - - mo-252 - - - sot833- 1 07-11-14 07-12-07 dimensions (mm are the original dimensions) xson8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 e 1 0 1 2 mm scale notes 1. including plating thickness. 2. can be visible in some manufacturing processes. unit mm 0.25 0.17 2.0 1.9 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.5 0.6 a (1) max 0.5 0.04 1 8 2 7 3 6 4 5 8 (2) 4 (2) a
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 13 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting fig 17. package outline sot902-1 (xqfn8u) references outline version european projection issue date iec jedec jeita sot902-1 mo-255 - - - - - - sot902- 1 05-11-25 07-11-14 unit a max mm 0.5 a 1 0.25 0.15 0.05 0.00 1.65 1.55 0.35 0.25 0.15 0.05 dimensions (mm are the original dimensions) x qfn8u: plastic extremely thin quad flat package; no leads; 8 terminals; utlp based; body 1.6 x 1.6 x 0.5 mm b dl e 1 1.65 1.55 e e l 1 v 0.1 0.55 0.5 w 0.05 y 0.05 0.05 y 1 0 1 2 mm scale x c y c y 1 terminal 1 index area terminal 1 index area b a d e detail x a a 1 b 8 7 6 5 e 1 e 1 e e a c b ? v m c ? w m 4 1 2 3 l l 1 metal area not for soldering
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 14 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting 15. abbreviations 16. revision history table 11. abbreviations acronym description cdm charged device model esd electrostatic discharge fet field effect transistor hbm human body model prr pulse rate repetition ttl transistor-transistor logic table 12. revision history document id release date data sheet status change notice supersedes cbtd3306 v.5 20110428 product data sheet - cbtd3306 v.4 modifications: ? table 2 : marking code table corrected (errata). cbtd3306 v.4 20100325 product data sheet - cbtd3306 v.3 cbtd3306 v.3 20100223 product data sheet - cbtd3306 v.2 cbtd3306 v.2 20091015 product data sheet - cbtd3306 v.1 cbtd3306 v.1 20011108 product data - -
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 15 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting 17. legal information 17.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 17.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 17.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interrupt ion, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qua lified for use in automotive applications. the product is not desi gned, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be ex pected to result in personal injury, death or severe property or environmental dam age. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this docu ment contains the product specification.
cbtd3306 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product specification rev. 5 ? 28 april 2011 16 of 17 nxp semiconductors cbtd3306 dual bus switch with level shifting export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from national authorities. 17.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 18. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors cbtd3306 dual bus switch with level shifting ? nxp b.v. 2011. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 28 april 2011 document identifier: cbtd3306 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 19. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 3 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 9 recommended operating conditions. . . . . . . . 3 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 4 10.1 typical pass voltage graphs . . . . . . . . . . . . . . . 5 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 7 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 14 package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 15 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 17 legal information. . . . . . . . . . . . . . . . . . . . . . . 15 17.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 17.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 17.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 17.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 18 contact information. . . . . . . . . . . . . . . . . . . . . 16 19 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

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